74LS109 Dual J-K Positive-edge-triggered Flip-Flop IC
74LS109 IC has two independently functional JK-flip flops inside a single package. The Flop-flops come with clear and clear option. Each flip has Preset, clear, clock, J and K asinput pins and Q, Q bar as output pins.
74LS109 IC has an operating voltage from 4.75V to 5.25V and can operate at a maximum clock frequency of 25 MHz. The minimum high level input voltage is 2V and the maximum low level input voltage is 0.8V
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74LS109 Dual J-K Positive-edge-triggered Flip-Flop IC
74LS109 IC has two independently functional JK-flip flops inside a single package. The Flop-flops come with clear and clear option. Each flip has Preset, clear, clock, J and K asinput pins and Q, Q bar as output pins.
74LS109 IC has an operating voltage from 4.75V to 5.25V and can operate at a maximum clock frequency of 25 MHz. The minimum high level input voltage is 2V and the maximum low level input voltage is 0.8V
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Description
74LS109 IC has two independently functional JK-flip flops inside a single package. The Flop-flops come with clear and clear option. Each flip has Preset, clear, clock, J and K asinput pins and Q, Q bar as output pins.
74LS109 IC has an operating voltage from 4.75V to 5.25V and can operate at a maximum clock frequency of 25 MHz. The minimum high level input voltage is 2V and the maximum low level input voltage is 0.8V
